1. Field of the Invention
The present invention is related to a gate driver and display device using the same, and more particularly, to a gate driver capable of modulating gate driving signals through charge sharing, and display device using the same.
2. Description of the Prior Art
A liquid crystal display (LCD) display has characteristics of light weight, low power consumption, zero radiation, etc. and is widely used in many information technology (IT) products, such as computer systems, mobile phones, and personal digital assistants (PDAs). The operating principle of the LCD display is based on the fact that different twist states of liquid crystals result in different polarization and refraction effects on light passing through the liquid crystals. Thus, the liquid crystals can be used to control amount of light emitted from the LCD display by arranging the liquid crystals indifferent twist states, so as to produce light outputs at various brightnesses, and diverse gray levels of red, green and blue light.
Please refer to FIG. 1, which is a schematic diagram of a thin film transistor (TFT) LCD display 10 of the prior art. The LCD display 10 includes an LCD panel 100, a source driver 102, a gate driver 104 and a voltage generator 106. The LCD panel 100 is composed of two substrates, and space between the substrates is filled with liquid crystal materials. One of the substrates is installed with data lines 108, scan lines (or gate lines) 110 and TFTs 112, and the other substrate is installed with a common electrode to provide a common signal Vcom outputted by the voltage generator 106. The TFTs 112 are arranged as a matrix on the LCD panel 100. Accordingly, each data line 108 corresponds to a column of the LCD panel 100, each scan line 100 corresponds to a row of the LCD panel 100, and each TFT 112 corresponds to a pixel. Note that, the LCD panel 100 composed of the two substrates can be regarded as an equivalent capacitor 114.
In FIG. 1, the gate driver 104 sequentially generates the gate driving signals VG_1-VG_M to row by row activate the TFTs 112 and update pixel data stored in the equivalent capacitors 114. In detail, please refer to FIG. 2, which is a schematic diagram of the gate driver 104. The gate driver 104 includes a logic circuit 105 and buffers 107_1-107_M. Load modules 109_1-109_M are equivalent circuits of loads. The logic circuit 105 controls transistor switches of the buffers 107_1-107_M to alternatively provide a high voltage VGG or a low voltage VEE to the load modules 109_1-109_M, so as to create square waves of the gate driving signals VG_1-VG_M.
However, since parasitic capacitors exist between the equivalent capacitors 114 and gates of the TFTs 112, variations of the gate driving signals VG_1-VG_M couple into the equivalent capacitors 114 via the parasitic capacitors at falling edges of the square waves of the gate driving signals VG_1-VG_M, resulting in distortion of image contents stored in the equivalent capacitors 114.
Therefore, finding an economic and power-efficient solution to alleviate the falling-edge coupling effect of the gate driving signals and overcome the image content bias problem has been a major focus of the industry.